Low latency and high bandwidth, signal integrity and in-depth board level simulation, power efficiency and thermal management
We design and develop complex and high density boards where signal integrity, power and thermal management are key success drivers. FPGA's and SoC's are typically at the heart of such designs. By starting at system level we are capable of optimising the balance between hardware and software functionality. Some examples are signal integrity simulations (multilane 25 Gigabit per sec), power management in highly constrained areas leading to very high board densities (in excess of 200 Amps, up to 30 layers), optimal load balancing between processors and FPGA, high-speed interconnects (16, 25, 40 and 100 Gbps) as well as high performance processing: real-time signal processing in parallel of 100+ industrial ultrasound modules performing B-mode processing.
HPC processing blade:
For the EUROEXA project, aimed to be able to perform calculations close to an exaflop (however with a significant improvement in power efficiency as compared to the current HPCs), TOPIC designed and developed the CRDB computer blade. The core processing unit for this HPC is completely based on FPGA technology. The end goal is to combine around 150,000 of these boards and be able to calculate at around 10^18 instructions per second. This CRDB-board is one of the most complex boards being developed at this moment with a 30-layer PCB, able to supply 200 Amps and establish a total interconnection speed of over 800 Gbps over multiple Firefly and ComExpress connections.